16-Bit Timer Mode (Tc5 And 6) - Toshiba TLCS-870/C Series Manual

8 bit microcontroller
Hide thumbs Also See for TLCS-870/C Series:
Table of Contents

Advertisement

10. 8-Bit TimerCounter (TC5, TC6)
10.1 Configuration

10.3.5 16-Bit Timer Mode (TC5 and 6)

In the timer mode, the up-counter counts up using the internal clock. The TimerCounter 5 and 6 are cascad-
able to form a 16-bit timer.
When a match between the up-counter and the timer register (TTREG5, TTREG6) value is detected after the
timer is started by setting TC6CR<TC6S> to 1, an INTTC6 interrupt is generated and the up-counter is cleared.
After being cleared, the up-counter continues counting. Program the lower byte and upper byte in this order in
the timer register. (Programming only the upper or lower byte should not be attempted.)
Note 1: In the timer mode, fix TCjCR<TFFj> to 0. If not fixed, the
Note 2: In the timer mode, do not change the TTREGj setting while the timer is running. Since TTREGj is not in the
Note 3: j = 5, 6
Table 10-6 Source Clock for 16-Bit Timer Mode
NORMAL1/2, IDLE1/2 mode
DV7CK = 0
11
fc/2
7
fc/2
5
fc/2
3
fc/2
Example :Setting the timer mode with source clock fc/2
(fc = 16.0 MHz)
TC6CR<TC6S>
Internal
source clock
Counter
TTREG5
(Lower byte)
TTREG6
(Upper byte)
INTTC6 interrupt request
shift register configuration in the timer mode, the new value programmed in TTREGj is in effect immediately
after programming of TTREGj. Therefore, if TTREGj is changed while the timer is running, an expected
operation may not be obtained.
Source Clock
SLOW1/2,
SLEEP1/2
DV7CK = 1
mode
3
3
fs/2
fs/2
7
fc/2
5
fc/2
3
fc/2
LDW
(TTREG5), 927CH
DI
SET
(EIRH). 4
EI
LD
(TC5CR), 13H
LD
(TC6CR), 04H
LD
(TC6CR), 0CH
0
1
2
3
?
n
?
m
Figure 10-6 16-Bit Timer Mode Timing Chart (TC5 and TC6)
,
, and
PDOj
PWMj
Resolution
fc = 16 MHz
fs = 32.768 kHz
128 µs
244.14 µs
8 µs
2 µs
500 ns
7
Hz, and generating an interrupt 300 ms later
: Sets the timer register (300 ms
: Enables INTTC6 interrupt.
:Sets the operating clock to fc/2
(lower byte).
: Sets the 16-bit timer mode (upper byte).
: Starts the timer.
mn-1
0
1
2
mn
Match
Counter
detect
clear
Page 112
TMP86PM29BUG
pins may output a pulse.
PPGj
Maximum Time Setting
fc = 16 MHz
fs = 32.768 kHz
8.39 s
16 s
524.3 ms
131.1 ms
32.8 ms
÷
7
2
/fc = 927CH).
7
, and 16-bit timer mode
mn-1
0
1
2
mn
Match
Counter
detect
clear
0

Advertisement

Table of Contents
loading

Table of Contents