Port P5 (P57 To P50) - Toshiba TLCS-870/C Series Manual

5.4 Port P5 (P57 to P50)

Port P5 is an 8-bit input/output port which is also used as a segment pins of LCD.
When used as input port, the respective output latch (P5DR) should be set to "1".
During reset, the P5DR is initialized to "1".
When used as a segment pins of LCD, the respective bit of P5LCR should be set to "1". When used as an output
port, the respective P5LCR bit should be set to "0".
P5 port output latch (P5DR) and P5 port terminal input (P5PRD) are located on their respective address.
When read the output latch data, the P5DR should be read and when read the terminal input data, the P5PRD reg-
ister should be read. If the terminal input data which is configured as LCD segment output is read, unstable data is
read.
P5LCRi input
Data input (P5PRD)
Data input (P5DR)
Data output (P5DR)
LCD data output
Port P5 control register
7 6
P5DR
P57 P56
(0005H)
SEG16 SEG17
R/W
7 6
P5LCR
(002AH)
Port P5/segment output control
P5LCR
(Set for each bit individually)
7 6
P5PRD
(000BH) P57 P56
Read only
ST P
UTEN
P5LCRi
D Q
D Q
utput latch
Figure 5-5 Port P5
5 4 3
P55 P54 P53
SEG18 SEG19 SEG20
5 4 3
0: P5 input/output port
1: LCD segment output
5 4 3
P55 P54 P53
Page 55
2 1 0
P52 P51 P50
(Initial value: 1111 1111)
SEG21 SEG22 SEG23
2 1 0
(Initial value: 0000 0000)
2 1 0
P52 P51 P50
TMP86PM29BUG
P5i
to
Note: i = 7 0
R/W