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9. 8-Bit TimerCounter (TC3, TC4)
9.1 Configuration
The TimerCounter 4 is controlled by the TimerCounter 4 control register (TC4CR) and two 8-bit timer registers
(TTREG4 and PWREG4).
TimerCounter 4 Timer Register
TTREG4
(001DH)
R/W
PWREG4
(002DH)
R/W
Note 1: Do not change the timer register (TTREG4) setting while the timer is running.
Note 2: Do not change the timer register (PWREG4) setting in the operating mode except the 8-bit and 16-bit PWM modes while
the timer is running.
TimerCounter 4 Control Register
TC4CR
(0019H)
TFF4
TFF4
TC4CK
TC4S
TC4M
Note 1: fc: High-frequency clock [Hz] fs: Low-frequency clock [Hz]
Note 2: Do not change the TC4M, TC4CK and TFF4 settings while the timer is running.
Note 3: To stop the timer operation (TC4S= 1 → 0), do not change the TC4M, TC4CK and TFF4 settings.
To start the timer operation (TC4S= 0 → 1), TC4M, TC4CK and TFF4 can be programmed.
Note 4: When TC4M= 1** (upper byte in the 16-bit mode), the source clock becomes the TC3 overflow signal regardless of the
TC4CK setting.
Note 5: To use the TimerCounter in the 16-bit mode, select the operating mode by programming TC4M, where TC3CR<TC3M>
must be set to 011.
7
6
5
4
7
6
5
4
7
6
5
4
TC4CK
Timer F/F4 control
Operating clock selection [Hz]
TC4 start control
TC4M operating mode select
3
2
1
0
3
2
1
0
3
2
1
0
TC4S
TC4M
0:
Clear
1:
Set
NORMAL1/2, IDLE1/2 mode
DV7CK = 0
11
000
fc/2
7
001
fc/2
5
010
fc/2
3
011
fc/2
100
fs
101
fc/2
110
fc
111
0:
Operation stop and counter clear
1:
Operation start
000:
8-bit timer/event counter mode
001:
8-bit programmable divider output (PDO) mode
010:
8-bit pulse width modulation (PWM) output mode
011:
Reserved
100:
16-bit timer/event counter mode
Warm-up counter mode
101:
16-bit pulse width modulation (PWM) output mode
110:
16-bit PPG mode
111:
Page 84
TMP86PM29BUG
(Initial value: 1111 1111)
(Initial value: 1111 1111)
(Initial value: 0000 0000)
SLOW1/2
SLEEP1/2
DV7CK = 1
mode
3
3
fs/2
fs/2
7
–
fc/2
5
–
fc/2
3
–
fc/2
fs
fs
fc/2
–
fc
–
TC4 pin input
R/W
R/W
R/W
R/W
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