Table 6-10 Pci Bus C Status Register - SMART Embedded Computing MVME3100 Installation And Use Manual

5.0V VIO Enabled. This bit set indicates that the PMC bus (PCI bus B) is configured for
5.0V VIO.
3.3V_VIO
3.3V VIO enabled. This bit set indicates that the PMC bus (PCI bus B) is configured to 3.3V
VIO.

Table 6-10 PCI Bus C Status Register

REG
BIT
FIELD
OPER
RESET
PCI_C_SPD
PCI bus C speed. Indicates the frequency of PCI bus C.
00: 33MHz
01: 66MHz
10: 100MHz
11: 133MHz
PCIX_C
PCI-X bus C. A set condition indicates that bus C is operating in
PCI-X mode. A cleared condition indicates PCI mode.
PCI_C_64B
PCI bus C 64-bit. A set condition indicates that bus C is enabled to operate in 64-bit mode.
A cleared condition indicates 32-bit mode.
RSVD
Reserved for future implementation.
MVME3100 Single Board Computer Installation and Use (6806800M28H)
PCI Bus C Status Register - 0xE2000006
7 6 5
R R R
X X X
PCI Bus Status Registers
4 3 2
R R R
0 1 X
1 0
R R
X X
111