Pci Bus Status Registers; Table 6-8 Pci Bus A Status Register - SMART Embedded Computing MVME3100 Installation And Use Manual

MAP_SEL
Memory map select. When this bit is cleared, the flash memory map is controlled by the
Flash Boot Block Select switch. When the map select bit is set, boot block A is selected and
mapped to the highest address.
RSVD
Reserved for future implementation.
6.2.9

PCI Bus Status Registers

The PCI Bus Status registers provide PCI bus configuration information for each of the PCI
buses.
Table 6-8
REG
BIT
FIELD
OPER
RESET
PCI_A_SPD
PCI bus A speed. Indicates the frequency of PCI bus A.
00: 33MHz
01: 66MHz
10: 100MHz
11: 133MHz
PCIX_A
PCI-X bus A. A set condition indicates that bus A is operating in PCI-X mode. A cleared
condition indicates PCI mode.
PCI_A_64B
PCI bus A 64-bit. A set condition indicates that bus A is enabled to operate in 64-bit mode.
A cleared condition indicates 32-bit mode.
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MVME3100 Single Board Computer Installation and Use (6806800M28H)
PCI Bus A Status Register
PCI Bus A Status Register - 0xE2000004
7 6 5
R R R
0 0 0
PCI Bus Status Registers
4 3 2
R R R
0 1 X
1 0
R R
0 1
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