Processor; System Memory; Local Bus Interface; Figure 4-2 Mvme721 Rtm Block Diagram - SMART Embedded Computing MVME3100 Installation And Use Manual

Figure 4-2 MVME721 RTM Block Diagram

PMC 1 Jn4 10
VPD
8K8
2
I C Bus
4390 0106
4.4

Processor

The MVME3100 supports the MPC8540 processor. The processor core frequency runs at
833MHz or 667MHz. The MPC8540 has integrated 256KB L2 cache.
4.5

System Memory

The MPC8540 provides one standard DDR SDRAM SODIMM socket. This socket supports
standard single or dual bank, unbuffered, SSTL-2 DDR-I, JESD8-9B compliant, SODIMM
module with ECC. The MPC8540 DDR memory interface supports up to 166MHz (333MHz
data rate) operation.
4.6

Local Bus Interface

The MVME3100 uses the MPC8540 local bus controller (LBC) for access to on-board flash
and I/O registers. The LBC has programmable timing modes to support devices of different
access times, as well as device widths of 8, 16, and 32 bits.
MVME3100 Single Board Computer Installation and Use (6806800M28H)
Future Option
U
PIM 10
S
B
PIM
P2
Rear Panel
GigE 10/100 Serial
RJ45 RJ45 RJ45
sATA
GigE 2
10/100
Serial Port 4
Serial Port 3
Serial Port 2
Serial Port 1
Processor
Serial Serial Serial
RJ45 RJ45 RJ45
sATA 3
USB 2
P0
Future Option
69