Analog Devices ADSP-219 Series Hardware Reference Manual page 51

All bits in this register reset to 0.
15 14 13 12
Table B-23. PCI_IRQSTAT Register Bit Descriptions
Bit Bit name
position
0 Reserved
1 RX0 DMA
2 RX1 DMA
3 TX0 DMA
4 Tx1 DMA
ADSP-2192 DSP Peripheral Registers
11 10 9 8
Description
Rx0 DMA Channel Interrupt.
Receive Channel 0 Bus Master Transactions
Sensitivity: Edge
Rx1 DMA Channel Interrupt.
Receive Channel 1 Bus Master Transactions
Sensitivity: Edge
Tx0 DMA Channel Interrupt.
Transmit Channel 0 Bus Master Transactions
Sensitivity: Edge
Tx1 DMA Channel Interrupt.
Transmit Channel 1 Bus Master Transactions
Sensitivity: Edge
ADSP-219x/2192 DSP Hardware Reference
7 6 5 4 3 2 1 0
B-51