Analog Devices ADSP-219 Series Hardware Reference Manual page 36

ADSP-2192 Peripheral Device Control Registers
CardBus Function Event (CB_FE0) Register
All bits in this register are reset to zero.
15 14 13 12
Table B-12. CB_FE0 Register Bit Description
Bit Position Bit Name
3:0 Reserved
4 GWKE
14:5 Reserved
15 INTE
B-36 ADSP-219x/2192 DSP Hardware Reference
11 10 9 8
Description
General Wakeup Event Pending.
This bit is equivalent to the PME_Status bit. It reads 1 if
CB_FPS0:GWAKE has been set by either a wakeup event on
AC'97 as enabled by APME, or by a wakeup event on GPIOs
enabled by GPME.
A write of a 1 clears this bit. This nonvolatile bit is reset by
power-on reset only, and is not affected by PCI RST, SYSRST
or Soft Reset.
Interrupt Event Pending.
Reads 1 if CB_FPS0:INTR is set and CB_FEM0:INTRM is 1.
Default=0.
A write of 1 clears all of the interrupts DSPI, WKI, GPI, and
TABI corresponding to bits 15:12 of the PCS register. This
bit is cleared by power-on reset and PCI RST. It is not affected
by SYSRST or the Soft Reset bit PCC:RST.
7 6 5 4 3 2 1 0