Analog Devices ADSP-219 Series Hardware Reference Manual page 52

ADSP-2192 Peripheral Device Control Registers
Table B-23. PCI_IRQSTAT Register Bit Descriptions (Continued)
Bit Bit name
position
5 MBox 0 IN
6 MBox 1 IN
7 MBox 0 OUT Outgoing Mailbox 0 PCI Interrupt.
8 MBox 1 OUT Outgoing Mailbox 1 PCI Interrupt.
9 Reserved
10 Reserved
11 GPIO
12 AC'97
13 Master
Abort
14 Target
Abort
15 Reserved
B-52 ADSP-219x/2192 DSP Hardware Reference
Description
Incoming Mailbox 0 PCI Interrupt.
PCI to DSP Mailbox 0 Transfer
Sensitivity: Edge
Incoming Mailbox 1 PCI Interrupt.
PCI to DSP Mailbox 1 Transfer
Sensitivity: Edge
DSP to PCI Mailbox 0 Transfer
Sensitivity: Edge
DSP to PCI Mailbox 1 Transfer
Sensitivity: Edge
Reserved
General Purpose I/O Pin Initiated.
Sensitivity: Level
AC'97 Interface Initiated.
Sensitivity: Edge
PCI Interface Master Abort Detected.
Sensitivity: Edge
PCI Interface Target Abort Detected.
Sensitivity: Edge