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ADSP-2192 Peripheral Device Control Registers
Table B-32. Power Management Register Interactions Between Functions
Name
Capability ID
Next_Cap_Ptr
Power
Management
Capabilities
Bits
Power Manage-
ment Control/
Status Bits
B-70
ADSP-219x/2192 DSP Hardware Reference
Version
PME Clock
Reserved
Device Specific Ini-
tialization
Aux Current
D1 Support
D2 Support
PME Support
Power State
Reserved
PME Enable
Data Select
Comments
Read-only
Read-only
2-0
Read-only
3
Read-only
4
Read-only
5
Read-only
8-6
Read-only by PCI, writable by DSP
9
Read-only
10
Read-only
15-11
Read-only by PCI, writable by DSP
1-0
Part will be in highest power state of the
three functions
7-2
Read-only, no interaction
8
Separate for each function, no interac-
tion
12-9
Read-only, no interaction
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