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15
14
13
12
DMA Control X - Bus Master Control and Status (PCI_DMACx)
Register
All bits in this register reset to 0.
15
14
13
12
Table B-22. PCI_DMACx Register Bit Descriptions
Bit
Bit name
position
0
DMA EN
1
WR/RD
2
Flush FIFO
3
DSP2/DSP1
4
PACK DIS
7:5
FUNCTION
<2:0>
ADSP-2192 DSP Peripheral Registers
11
10
9
8
11
10
9
8
Description
DMA Enable.
DMA Write / Read.
Flush Master FIFO.
Select DSP2 / DSP1.
DMA Packing Disable (DWORD Mode).
Function Select (0, 1, and 2).
ADSP-219x/2192 DSP Hardware Reference
7
6
5
4
7
6
5
4
3
2
1
0
3
2
1
0
B-49
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