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Analog Devices ADSP-219 Series Hardware Reference Manual page 61

Dsp peripheral registers

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Table B-28. PCI CONFIG SPACE for Function 0 (Continued)
Address
Name
0x05-0x04
Command Register
0x07-0x06
Status Register
0x08
Revision ID
0x0B-0x09
Class Code
0x0C
Cache Line Size
0x0D
Latency Timer
0x0E
Header Type
0x0F
BIST
0x13-0x10
Base Address 1
0x17-0x14
Base Address 2
0x1B-0x18
Base Address 3
0x1F-0x1C
Base Address 4
0x23-0x20
Base Address 5
0x27-0x24
Base Address 6
0x2B-0x28
Cardbus CIS Pointer
ADSP-2192 DSP Peripheral Registers
Reset
0x0
0x0
0x0
0x078000
0x0
0x0
0x80
0x0
0x08
0x08
0x08
0x01
0x0
0x0
0x1FF03
ADSP-219x/2192 DSP Hardware Reference
Comments
Bus Master, Memory Space Capable,
I/O Space Capable
Bits enabled: Capabilities List, Fast
B2B, Medium Decode
Writable from the DSP during initial-
ization
Writable from the DSP during initial-
ization
Read-only
Multifunction bit set
Unimplemented
Register Access for all ADSP-2192 Reg-
isters, Prefetchable Memory
24-bit DSP Memory Access
16-bit DSP Memory Access
I/O access for control registers and DSP
memory
Unimplemented
Unimplemented
CIS RAM Pointer - Function 0 (Read
Only).
B-61

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