Signal Routing; Ppda Basic Signal Routing Example - GE Mark VIeS System Manual

10.2.4.1 Signal Routing

The PPDA I/O pack is mounted to either a JPDG or JPDS board. Additional boards can be connected using 50-pin ribbon
cable jumpers that are wired pin 1 to pin 1. Each board contributes one feedback group to PPDA. This connection passes
through up to five previous boards. In the following figure, feedback groups are displayed as bold lines and connectors P1 and
P2 of each board are displayed. From right to left, the JPDS board hosts the PPDA I/O pack and hookups are as follows:
• Local feedback from JDPS is connected to signal group A
• An additional board would use signal group E
Note The maximum length of the FRC is supported. If one end of the FRC is open, the PPDA may read incorrect values.
10.2.5 Operation
The following features are common to the distributed I/O modules:
• BPPx Processor
• Processor LEDs
• Power Management
• ID Line
• I/O Module Common Diagnostic Alarms
PDM Power Distribution Modules
JPDS
Local
Fdbk

PPDA Basic Signal Routing Example

Public Information
PPDA
A
B
C
D
E
F
GEH-6855_Vol_II System Guide 311