Yvib Diagnostics - GE Mark VIeS System Manual

8.3.5 YVIB Diagnostics

Note Details of the individual diagnostics are available from the ToolboxST application. The diagnostic signals can be
individually latched and then cleared from the ToolboxST Component Editor, or by using the RSTDIAG signal on SYS_
OUTPUTS block, or through the WorkstationST Alarm Viewer.
The I/O pack performs the following self-diagnostic tests:
• A power-up self-test that includes checks of RAM, flash memory, Ethernet ports, and most of the processor board
hardware
• Continuous monitoring of the internal power supplies for correct operation
• A check of the electronic ID information from the terminal board, acquisition board, and processor board to confirm that
the hardware set matches, followed by a check that the application code loaded from flash memory is correct for the
hardware set
• Each vibration input has hardware limit checking based on preset (configurable) high and low levels near the end of the
operating range. If this limit is exceeded, a logic signal is set. The logic signal, L3DIAG_xxxx, refers to the entire board.
There are diagnostic alarms for this (Alarm 33-45).
• Each input has system limit checking based on configurable high and low levels. The Sys_Outputs block can be used to
reset any latched system limits. System limits can be used to drive process alarms through users application code.
270 GEH-6855_Vol_II GEH-6855_Vol_II Mark VIeS Functional Safety Systems Volume II
Public Information