R8C/11 Group
13.1.3 Continuous Receive Mode
Continuous receive mode is held by setting setting the U0RRM bit in the UCON register to "1" (en-
ables continuous receive mode). In this mode, reading the U0RB register sets the TI bit in the U0C1
register to "0"(data in the U0TB register). When the U0RRM bit is set to "1", do not write dummy data
to tge U0TB register in a program.
Rev.1.20
Jan 27, 2006
REJ09B0062-0120
page 118 of 204
13.1 Clock Synchronous Serial I/O Mode