Int1 Interrupt And Int2 Interrupt - Renesas M16C Series Hardware Manual

R8C/11 Group
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10.2.3 INT1 Interrupt and INT2 Interrupt

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INT1 interrupts are triggered by INT1 inputs. The edge polarity is selected with the R0EDG bit in the
TXMR register. The INT1 pin is shared with the CNTR0 pin.
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INT2 interrupts are triggered by INT2 inputs. The edge polarity is selected with the R1EDG bit in the
TYZMR register. The INT2 pin is shared with the CNTR1 pin.
Figure 10.13 shows the TXMR and TYZMR registers when using INT1 and INT2 interrupts.
T i m e r X m o d e r e g i s t e r
b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0
0 0 0 0
N O T E S :
1 . T h e I R b i t i n t h e I N T 1 I C m a y b e s e t t o " 1 " ( i n t e r r u p t r e q u e s t e d ) w h e n t h e R 0 E D G b i t i s r e w r i t t e n . R e f e r t o t h e
p a r a g r a p h 1 9 . 2 . 5 " C h a n g i n g I n t e r r u p t F a c t o r " i n t h e U s a g e N o t e s R e f e r e n c e B o o k .
2 . T h i s b i t i s u s e d t o s e l e c t t h e p o l a r i t y o f I N T 1 i n t e r r u p t i n t i m e r m o d e .
3 . W h e n u s i n g I N T 1 i n t e r r u p t s , s h o u l d s e l e c t t i m e r m o d e .
T i m e r Y , Z m o d e r e g i s t e r
b7 b 6 b 5 b 4 b 3 b2 b 1 b 0
N O T E S :
1 . W h e n u s i n g I N T 2 i n t e r r u p t s , m u s t s e t t o t i m e r m o d e .
2 . T h e I R b i t i n t h e I N T 2 I C m a y b e s e t t o " 1 " ( i n t e r r u p t r e q u e s t e d ) w h e n t h e R 1 E D G b i t i s r e w r i t t e n .
R e f e r t o t h e p a r a g r a p h 1 9 . 2 . 5 " C h a n g i n g I n t e r r u p t F a c t o r " i n t h e U s a g e N o t e s R e f e r e n c e B o o k .
Figure 10.13 TXMR Register and TYZMR Register when INT1 and INT2 Interrupt Used
Rev.1.20 Jan 27, 2006
REJ09B0062-0120
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S y m b o l
T X M R
0
0
B i t s y m b o l
B i t n a m e
T X M O D 0 O p e r a t i o n m o d e
s e l e c t b i t 0 , 1
T X M O D 1
I N T 1 / C N T R
R0EDG
s w i t c h i n g b i t
T i m e r X c o u n t
T X S
s t a r t f l a g
TXOCNT
M u s t s e t t o " 0 " i n t i m e r m o d e
O p e r a t i o n m o d e
TXMOD2
s e l e c t b i t 2
TXEDG Must set to "0" in timer mode
Must set to "0" in timer mode
T X U N D
S y m b o l
T Y Z M R
0
B i t s y m b o l
Bit name
Timer Y operation
T Y M O D 0
mode bit
I N T 2 / C N T R 1 p o l a r i t y
R 1 E D G
s w i t c h i n g b i t
Timer Y write
T Y W C
control bit
Timer Y count
TYS
start flag
Timer Z-related bit
T Z M O D 0
T Z M O D 1
T Z W C
T Z S
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A d d r e s s A f t e r r e s e t
0 0 8 B 0 0
1 6 1 6
Function
b1 b0
0 0 : T i m e r m o d e o r p u l s e p e r i o d
m e a s u r e m e n t m o d e
p o l a r i t y
0 0 : Rising edge
(1 , 2 )
1 : Falling edge
0 : Stops counting
1 : Starts counting
0 : O t h e r t h a n p u l s e p e r i o d m e a s u r e m e n t
(3 )
m o d e
A d d r e s s A f t e r r e s e t
0 0 8 0 0 0
1 6 1 6
F u n c t i o n
(1 )
0 : T i m e r m o d e
0 : R i s i n g e d g e
1 : F a l l i n g e d g e
(2 )
Function varies
depending on the operation mode
0 : S t o p s c o u n t i n g
1 : S t a r t s c o u n t i n g
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10.2 INT Interrupt
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R W
R W
(3 )
R W
RW
RW
RW
RW
RW
RW
R W
R W
RW
R W
RW
RW
R W
R W
R W
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