Quasonix TIMTER Installation And Operation Manual page 81

The IRIG standard calls out six variants of LDPC codes—all combinations of two different information block sizes
(k=4096 bits and k=1024 bits) and three different code rates (r=1/2, r=2/3, and r=4/5).
With the LD6 option, use LD 0 or 1 to disable or enable LDPC, then use 0-5 to indicate the desired LDPC code. A
space is required between the disable/enable code and the desired LDPC selection, as shown in the examples.
Examples:
LD 0 Disable the LDPC encoder
LD 1 0 Enable the LDPC encoder and set the block size and code rate to k=4096, r=1/2
LD 1 1 Enable the LDPC encoder and set the block size and code rate to k=1024, r=1/2
LD 1 2 Enable the LDPC encoder and set the block size and code rate to k=4096, r=2/3
LD 1 3 Enable the LDPC encoder and set the block size and code rate to k=1024, r=2/3
LD 1 4 Enable the LDPC encoder and set the block size and code rate to k=4096, r=4/5
LD 1 5 Enable the LDPC encoder and set the block size and code rate to k=1024, r=4/5
LDPC Header Select – LHS
4.2.3.1.5
The LHS command sets the header to use with Low Density Parity Check (LDPC) coding on a transmitter. Valid
settings are 0 through 6, however code 6 is for Quasonix internal use only.
0 - SOQPSK/LDPC code 0
1 - SOQPSK/LDPC code 1
2 - SOQPSK/LDPC code 2
3 - SOQPSK/LDPC code 3
4 - SOQPSK/LDPC code 4
5 - SOQPSK/LDPC code 5
6 - iNet test code 6 (Quasonix internal)
74 Quasonix, Inc.
LD6 Code Block Size and Code Rate
0
1
2
3
4
5
TIMTER™ Multi-mode Dual
Telemetry Transmitter
k=4096, r=1/2
k=1024, r=1/2
k=4096, r=2/3
k=1024, r=2/3
k=4096, r=4/5
k=1024, r=4/5
0 // LDPC k=4096 r=1/2
1 // LDPC k=1024 r=1/2
2 // LDPC k=4096 r=2/3
3 // LDPC k=1024 r=2/3
4 // LDPC k=4096 r=4/5
5 // LDPC k=1024 r=4/5
6 // inet M.R. test