Appendix A Preset State - Keysight Technologies N4960A User Manual

Setting
10 MHz Reference
Clock Source
Delay Clock Amplitude
Delay Clock Coupling
Delay Clock Delay
Delay Clock Offset
Delay Clock Output Enable
Delay Clock Source
Delay Clock Termination
Delay Frequency
Divided Clock Amplitude
Divided Clock Coupling
Divided Clock Divide By
Divided Clock Offset
Divided Clock Output Enable
Divided Clock Termination
External Jitter
Frequency
Jittered Clock Amplitude
Jittered Clock Coupling
Jittered Clock Offset
Jittered Clock Output Enable
Jittered Clock Termination
LB Gain
PJ Amplitude
PJ Enable
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide

8 Appendix A Preset State

The following settings are the default values after performing an
instrument preset:
Table 39. N4960A serial BERT preset state
Preset State
Auto
Internal
0.700 V
AC
0.0 UI
0 V
Off
System
0 V
See Frq (displays Frequency when Delay Clock Source set to
System)
0.700 V
AC
4
0 V
Off
0 V
Off
5 GHz
0.700 V
AC
0 V
Off
0 V
1.0 UI/V
0.0 UI
Off
Appendix A Preset State
235