Interrupt Response Time; Changes Of Ipl When Interrupt Request Acknowledged - Renesas R8C/Tiny Series Software Manual

Chapter 5 Interrupts

5.3.1 Interrupt Response Time

Figure 5.3.2 shows the interrupt response time. The interrupt response time is the period from when an
interrupt request is generated until the first instruction of the interrupt routine is executed. This period
consists of the time ((a) in Figure 5.3.1) from when the interrupt request is generated to when the
instruction then under way is completed and the time (20 cycles (b)) in which the interrupt sequence is
executed.
Interrupt request generated
(a) Time from when interrupt request is generated to when the instruction then under execution is
completed. Time (a) varies with the instruction being executed. The DIVX instruction requires a
maximum time of 30 cycles (cycle number: no wait states, divisor is stored in a register).
(b) The address-match interrupt and the single-step interrupt are each 21 cycles.
Figure 5.3.2 Interrupt Response Time

5.3.2 Changes of IPL when Interrupt Request Acknowledged

When an interrupt request of a maskable interrupt is acknowledged, the interrupt priority level of the
acknowledged interrupt is set in IPL.
When a software interrupt request or a special interrupt request is acknowledged, the value shown in
Table 5.3.1 is set in IPL. Table 5.3.1 shows the value of IPL when software interrupts and special
interrupt requests are acknowledged.
Table 5.3.1 Value of IPL when Software Interrupt and Special Interrupt Request Acknowledged
Interrupt Sources Without Interrupt Priority Levels
Watchdog timer, oscillation stop detection
Software, address-match, single-step
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
Interrupt request acknowledged
Instruction Interrupt sequence
(a)
Interrupt response time
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Instruction in interrupt
routine
20 cycles (b)
5.3 Interrupt Sequence
Time
Value that is set to IPL
7
Not changed