Renesas R8C/Tiny Series Software Manual page 58

Chapter 3 Functions
ADC
[ Syntax ]
ADC.size src,dest
[ Operation ]
dest src +
[ Function ]
• This instruction adds
dest
• If is A0 or A1 and the selected size specifier (.size) is (.B),
calculation in 16 bits. If
A1.
[ Selectable src/dest ]
R0L/R0 R0H/R1
*1 *1
A0/A0 A1/A1
dsp:8[A0] dsp:8[A1]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0 R3R1
*1 If (.B) is selected as the size specifier (.size), A0 or A1 cannot be chosen for
neously.
[ Flag Change ]
Flag U I O
Change
Conditions
O : The flag is set when a signed operation results in a value exceeding +32767 (.W) or –32768 (.W)
or +127 (.B) or –128 (.B); otherwise cleared.
S : The flag is set when the operation results in MSB = 1; otherwise cleared.
Z : The flag is set when the operation results in 0; otherwise cleared.
C : The flag is set when an unsigned operation results in a value exceeding +65535 (.W) or +255 (.B);
otherwise cleared.
[ Description Example ]
ADC.B #2,R0L
ADC.W A0,R0
ADC.B A0,R0L
ADC.B R0L,A0
[ Related Instructions ]
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
ADdition with Carry
B , W
dest + C
dest src
, , and the C flag and stores the result in
src
is A0 or A1, the operation is performed on the eight low-order bits of A0 or
src
R1L/R2 R1H/R3
[A0] [A1]
dsp:8[SB] dsp:8[FB] dsp:8[A0]
dsp:16[SB] abs16
abs20 #IMM
A1A0
B S Z D C
ADCF, ADD, SBB, SUB
page 40 of 263
Add with carry
[ Instruction Code/Number of Cycles ]
R0L/R0 R0H/R1
*1
A0/A0 A1/A1
dsp:8[A1]
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
dsp:20[A0] dsp:20[A1] abs20
R2R0 R3R1
; 8 low-order bits of A0 and R0L are added.
; R0L is zero-expanded and added to A0.
3.2
dest
.
src
is zero-expanded to perform
dest
R1L/R2 R1H/R3
*1
[A0] [A1]
dsp:8[SB] dsp:8[FB]
A1A0
src dest
and
Functions
ADC
Page: 138
simulta-