Renesas R8C/Tiny Series Software Manual page 134

Chapter 3 Functions
SHA
[ Syntax ]
SHA.size src,dest
[ Operation ]
src
When
src
When
[ Function ]
• This instruction arithmetically shifts
ing from LSB (MSB) are transferred to the C flag.
src
• If is an immediate value , the number of bits shifted is –8 to –1 or +1 to +8. Values less than –8,
equal to 0, or greater than +8 are not valid.
src
• If is a register and (.B) is selected as the size specifier (.size), the number of bits shifted is –8 to +8.
Although a value of 0 may be set, no bits are shifted and no flags are changed. If a value less than –
8 or greater than +8 is set, the result of the shift is undefined.
src
• If is a register and (.W) or (.L) is selected as the size specifier (.size), the number of bits shifted is
–16 to +16. Although a value of 0 may be set, no bits are shifted and no flags are changed. If a value
less than –16 or greater than +16 is set, the result of shift is undefined.
[ Selectable src/dest ]
R0L/R0 R0H/R1
A0/A0 A1/A1
dsp:8[A0] dsp:8[A1]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0 R3R1
src
*1 If is R1H, R1 or R1H cannot be chosen for
*2 The acceptable range of values is –8 < #IMM < +8. However, 0 is invalid.
*3 Only (.L) can be selected as the size specifier (.size). (.B) or (.W) can also be specified for
[ Flag Change ]
U I O B
Flag
Change
Conditions
O : The flag is set when the operation results in MSB changing its state from 1 to 0 or from 0 to 1; otherwise
cleared. However, the flag does not change if (.L) is selected as the size specifier (.size).
S : The flag is set when the operation results in MSB = 1; otherwise cleared.
Z : The flag is set when the operation results in 0; otherwise cleared. However, the flag value is undefined if (.L)
is selected as the size specifier (.size).
C : The flag is set when the bit shifted out last is 1; otherwise cleared. However, the flag is indeterminate if (.L)
is selected as the size specifier (.size).
[ Description Example ]
SHA.B #3,R0L
SHA.B #–3,R0L
SHA.L R1H,R2R0
[ Related Instructions ]
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
SHift Arithmetic
B , W , L
< 0
> 0
C
dest
src
R1L/R2 R1H
[A0] [A1]
dsp:8[SB] dsp:8[FB]
dsp:16[SB] abs16
abs20 #IMM
A1A0
S Z D C
ROLC, RORC, ROT, SHL
page 116 of 263
Shift arithmetic
[ Instruction Code/Number of Cycles ]
MSB dest
MSB dest
left or right the number of bits indicated by
*1 /R3 R0L/R0 R0H/R1
A0/A0 A1/A1
dsp:8[A0] dsp:8[A1]
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
*2 dsp:20[A0] dsp:20[A1] abs20
R2R0 *3 R3R1
dest
.
*1 If the number of bits shifted is 0, no flags are changed.
; Arithmetically shifted left
; Arithmetically shifted right
3.2
C
LSB
0
LSB
src
. Bits overflow-
dest
*1 R1L/R2 R1H/R3
[A0] [A1]
dsp:8[SB] dsp:8[FB]
*3 A1A0
Functions
SHA
Page: 225
*1
dest
.