Renesas R8C/Tiny Series Software Manual page 86

Chapter 3 Functions
DIVU
[ Syntax ]
DIVU.size src
[ Operation ]
If the size specifier (.size) is (.B)
R0L (quotient), R0H (remainder)
If the size specifier (.size) is (.W)
R0 (quotient), R2 (remainder)
[ Function ]
• This instruction divides R2R0 (R0)
*1
(R0L) and the remainder in R2 (R0H)
registers that are the object of the operation when (.B) is selected as the size specifier (.size).
src
• If is A0 or A1 and the selected size specifier (.size) is (.B), the operation is performed on the 8 low-
order bits of A0 or A1.
• If (.B) is selected as the size specifier (.size), the O flag is set when the operation results in a quotient
exceeding 8 bits or the divisor is 0. In this case, R0L and R0H are undefined.
• If (.W) is selected as the size specifier (.size), the O flag is set when the operation results in a quotient
exceeding 16 bits or the divisor is 0. In this case, R0 and R2 are undefined.
[ Selectable src ]
R0L/R0 R0H/R1
A0/A0 A1/A1
dsp:8[A0] dsp:8[A1]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0 R3R1
[ Flag Change ]
U I O
Flag
Change
Conditions
O : The flag is set when the operation results in a quotient exceeding 16 bits (.W) or 8 bits (.B) or the
divisor is 0; otherwise cleared.
[ Description Example ]
DIVU.B A0
DIVU.B #4
DIVU.W R0
[ Related Instructions ]
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
DIVide Unsigned
R2R0
*1
src
R1L/R2 R1H/R3
[A0] [A1]
dsp:8[SB] dsp:8[FB]
dsp:16[SB] abs16
abs20 #IMM
A1A0
B S Z D C
DIV, DIVX, MUL, MULU
page 68 of 263
Unsigned divide
[ Instruction Code/Number of Cycles ]
B , W
R0 src
src
by the unsigned value of
*1
. Items in parentheses and followed by
;Value of 8 low-order bits of A0 is the divisor.
3.2 Functions
DIVU
src
and stores the quotient in R0
"*1"
( )
Page: 171
*1
indicate