Saving Register Contents - Renesas R8C/Tiny Series Software Manual

Chapter 5 Interrupts

5.3.3 Saving Register Contents

In an interrupt sequence, the contents of the FLG register and the PC are saved to the stack area.
The order in which these are saved is as follows. First, the 4 high-order bits of the PC and 4 high-order
bits (IPL) and 8 low-order bits of the FLG register, a total of 16 bits, are saved to the stack area. Next,
the 16 low-order bits of the PC are saved. Figure 5.3.3 shows the stack status before an interrupt
request is acknowledged.
If there are any other registers to be saved, use a program to save them at the beginning of the interrupt
routine. The PUSHM instruction can be used to save all registers, except SP, by a single instruction.
Stack area
MSB
A d d r e s s
m–4
m – 3
m – 2
m – 1
m Content of previous stack
C o n t e n t o f p r e v i o u s s t a c k
m+1
Stack status before interrupt request is
acknowledged
Figure 5.3.3 Stack Status Before and After an Interrupt Request is Acknowledged
The register save operations performed as part of an interrupt sequence are executed in four parts 8 bits
at a time. Figure 5.3.4 shows the operations when saving register contents.
Note 1: When the INT instruction for software interrupt numbers 32 to 63 is executed, SP is indicated by
the U flag. It is indicated by ISP in all other cases.
Figure 5.3.4 Operations when Saving Register Contents
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
LSB
[ S P ]
S P v a l u e b e f o r e
i n t e r r u p t r e q u e s t i s
a c k n o w l e d g e d
A d d r e s s S t a c k a r e a
[ S P ] – 5
[ S P ] – 4
[ S P ] – 3
[ S P ] – 2
[ S P ] – 1
F L G H
[ S P ]
N o t e 1 : [ S P ] d e n o t e s t h e i n i t i a l v a l u e o f t h e s t a c k p o i n t e r ( S P ) w h e n a n
i n t e r r u p t r e q u e s t i s a c k n o w l e d g e d . A f t e r t h e m i c r o c o m p u t e r
f i n i s h e s s a v i n g r e g i s t e r c o n t e n t s , t h e S P c o n t e n t i s [ S P ] m i n u s 4 .
page 254 of 263
MSB
A d d r e s s
m–4
m – 3
m – 2
m – 1
F L G H
m Content of previous stack
C o n t e n t o f p r e v i o u s s t a c k
m+1
Stack status after interrupt request is acknowledged
S e q u e n c e i n w h i c h o r d e r
r e g i s t e r s a r e s a v e d
PC
( 3 )
L
P C
M
( 4 )
FLG
L
( 1 )
PC
H ( 2 )
F i n i s h e d s a v i n g r e g i s t e r s
i n f o u r p a r t s .
5.3 Interrupt Sequence
Stack area
L S B
[SP]
P C
L New SP value
P C
M
F L G
L
P C
H
S a v e d s e p a r a t e l y , 8 b i t s a t a t i m e