Renesas R8C/Tiny Series Software Manual page 147

Chapter 3 Functions
TST
[ Syntax ]
TST.size
[ Operation ]
dest src
[ Function ]
• Each flag in the flag register changes state depending on the result of a logical AND of
dest
• If is A0 or A1 and the selected size specifier (.size) is (.B),
operation in 16 bits. If
[ Selectable src/dest ]
R0L/R0 R0H/R1
A0/A0 *1 A1/A1 *1
dsp:8[A0] dsp:8[A1]
dsp:16[A0] dsp:16[A1]
dsp:20[A0] dsp:20[A1]
R2R0 R3R1
*1 If (.B) is selected as the size specifier (.size), A0 or A1 cannot be chosen for
neously.
[ Flag Change ]
Flag U I O
Change
Conditions
S : The flag is set when the operation results in MSB = 1; otherwise cleared.
Z : The flag is set when the operation results in 0; otherwise cleared.
[ Description Example ]
TST.B #3,R0L
TST.B A0,R0L
TST.B R0L,A0
[ Related Instructions ]
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
src,dest
B , W
src
is A0 or A1, the operation is performed on the 8 low-order bits of A0 or A1.
src
R1L/R2 R1H/R3
[A0] [A1]
dsp:8[SB] dsp:8[FB] dsp:8[A0]
dsp:16[SB] abs16
abs20 #IMM
A1A0
B S Z D C
AND, OR, XOR
page 129 of 263
Test
TeST
[ Instruction Code/Number of Cycles ]
src
R0L/R0 R0H/R1
A0/A0 *1 A1/A1 *1
dsp:8[A1]
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
dsp:20[A0] dsp:20[A1] abs20
R2R0 R3R1
; 8 low-order bits of A0 and ROL are the objects of the operation.
; Zero-expanded value of R0L and A0 are the objects of the operation.
3.2 Functions
TST
Page: 239
src
and
is zero-expanded to perform
dest
R1L/R2 R1H/R3
[A0] [A1]
dsp:8[SB] dsp:8[FB]
A1A0
src dest
and
dest
.
simulta-