Renesas R8C/Tiny Series Software Manual page 175

Chapter 4 Instruction Codes/Number of Cycles
(1) BRK
b7
0 0 0 0 0 0 0 0
[ Number of Bytes/Number of Cycles ]
Bytes/Cycles
• If the target address of the BRK interrupt is specified using the interrupt table register (INTB), the
number of cycles shown in the table increases by two. In this case, set FF
through FFFE7 .
16
(1) BSET:G dest
b7
0 1 1 1 1 1 1 0 1 0 0 1
dest
bit,R0
bit,R1
bit,Rn
bit,R2
bit,R3
bit,A0
bit,An
bit,A1
[A0]
[An]
[A1]
[ Number of Bytes/Number of Cycles ]
dest bit,Rn bit,An
Bytes/Cycles
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
b0
1/27
b0 b7
DEST
0 0 0 0
base:8[An]
0 0 0 1
0 0 1 0
bit,base:8
0 0 1 1
[SB/FB]
0 1 0 0
base:16[An]
0 1 0 1
0 1 1 0 bit,base:16[SB]
0 1 1 1 bit,base:16
[An]
3/2 3/2 2/6
page 157 of 263
4.2 Instruction Codes/Number of Cycles
dest code
b0
(
DEST dsp8
dsp16
dest
base:8[A0]
base:8[A1]
bit,base:8[SB]
bit,base:8[FB]
base:16[A0]
base:16[A1]
bit,base:16[SB]
bit,base:16
base:8 bit,base:8 base:16
[An] [SB/FB]
3/6 3/3
in addresses FFFE4
16
BSET
)
DEST
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
bit,base:16
bit,base:16
[An] [SB]
4/6 4/3
BRK
16
4/3