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Status Register System
Setting and Querying the Status Register
N9340B Programmer's Guide
The hardware status registers are combined to form the
instrument status system. Specific status bits are assigned to
monitor various aspects of the instrument operation and
status. See the following diagram of the status system for
information about the bit assignments and status register
interconnections.
Figure 1
Agilent N9340B Status Register System
Error/Event Queue Summary
Message Available (MAV)
Std. Event Status Sum
Unused
0
Unused
1
Query Error
2
Dev. Dep. Error
3
Unused
4
Command Error
5
Reserved
6
Power On
7
Standard Event Status Register
(*ESE,*ESE?,*ESR?,*)
Each bit in a register is represented by a numerical value
based on its location. This number is sent with the
command to enable a particular bit. To enable more than
one bit, send the sum of all of the bits involved.
For example, to enable bit 0 and bit 6 of the standard event
status register, you would send the command *ESE 65 (1 +
64).
The results of a query are evaluated in a similar way. If the
*STB? command returns a decimal value of 140, (140 = 128
+ 8 + 4) then bit 7 is true, bit 3 is true, and bit 2 is true.
Status Byte Register
Unused
0
Unused
1
2
Unused
3
4
5
Unused
6
Reserved
7
+
+
&
7 6 5 4 3 2 1 0
Service Request Enable Register
Status Registers
3
(*STB?)
&
&
&
&
&
&
(*SRE,*SRE?)
25
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