Omron SYSMAC C Series Operation Manual page 94

Data Exchange with CPU Unit
Output Word
Direction Bit
0 PC Busy
1 PC Write Complete
2 PC Read Complete
3 EEPROM write bit
4 Serial port write enable bit
5 High/low alarm reset bit
n: 6 Out-of-range error reset bit
From F
7 Peak hold reset bank select bit
CPU Unit
to Analog
I/O Unit
8 Peak hold register 1/9 reset bit
9 Peak hold register 2/10 reset bit
10 Peak hold register 3/11 reset bit
11 Peak hold register 4/12 reset bit
12 Peak hold register 5/13 reset bit
13 Peak hold register 6/14 reset bit
14 Peak hold register 7/15 reset bit
15 Peak hold register 8/16 reset bit
Input Word
Direction Bit
0 A/D Busy
1 A/D Read Complete
2 A/D Write Complete
3 Unconfirmed data error flag
4 Conversion error flag
5 High/low alarm error flag
n+1: n+1:
F From
6 Out-of-range error flag
Analog
I/O Unit
I/O Unit
to CPU
7 Unit good flag
Unit
8 Peak hold reset 1/9 acknowledged flag
9 Peak hold reset 2/10 acknowledged flag
10 Peak hold reset 3/11 acknowledged flag
11 Peak hold reset 4/12 acknowledged flag
12 Peak hold reset 5/13 acknowledged flag
13 Peak hold reset 6/14 acknowledged flag
14 Peak hold reset 7/15 acknowledged flag
15 Peak hold reset 8/16 acknowledged flag
Name
These bits operate automatically when executing I/O
READ/WRITE instructions. It is not possible for the user to READ/WRITE i
write to these bits. Set to 0 when outputting word n using an write to these bits. Set to 0 when outputting word n using an
output instruction, such as the MOV instruction.
Turn ON this bit to cause the Unit to write the current RAM
configuration to EEPROM memory in the Unit. On power up,
the new parameters will be the default start up parameters.
This bit enables/disables the serial port on the Unit for writing
to the Unit memory map.
Turns OFF bit 5 of word n+1, the High/Low Alarm Flag.
Turns OFF bit 6 of word n+1, the Out-of-range Flag.
Selects which bank of peak hold registers to reset. When this
bit is OFF, bits 8 to 15 correspond to input points 1 through 8.
When this bit is ON, bits 8 to 15 correspond to input points 9
to 16.
These bits reset the peak hold registers in the Unit memory
map for the input points specified.
Name
Description
t ti It i
p g
Description
These bits operate automatically when executing I/O p
READ/WRITE instructions.
This flag is turned ON when invalid data is received
from the serial port or an I/O WRITE instruction. The
flag is turned OFF when valid data is sent to the Unit.
This flag is turned ON if the Unit detects an internal
conversion or calculation error.
This flag is turned ON when a high/low alarm occurs for
any input point.
This flag is turned ON when an out-of-range range error
occurs for any input point.
This flag oscillates at a rate of 1 Hz when the Unit is
operating correctly, 0.5 s ON, 0.5 s OFF.
These flags acknowledge that the peak hold registers g g
have been reset by the Unit.
Section 5-4
t ibl f th t
y
y g
p g
79