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Programming
Monitoring the Instrument
Status Byte register
The Status Byte Register contains summary bits that monitor activity in the other
status registers and queues. The Status Byte Register's bits are set and cleared by the
presence and absence of a summary bit from other registers or queues. Notice in the
following figure that the bits in the Standard Event Status, OPERation status, and
QUEStionable status registers are "or'd" to control a bit in the Status Byte Register.
If a bit in the Status Byte Register goes high, you can query the value of the source
register to determine the cause.
The Status Byte Register can be read using either the *STB? common command or
the GPIB serial poll command. Both commands return the decimal-weighted sum of
all set bits in the register. The difference between the two methods is that the serial
poll command reads bit 6 as the Request Service (RQS) bit and clears the bit which
clears the SRQ interrupt. The *STB? command reads bit 6 as the Master Summary
Status (MSS) and does not clear the bit or have any effect on the SRQ interrupt. The
value returned is the total bit weights of all of the bits that are set at the present time.
OPERation Status and QUEStionable Status registers
You can query the value of the OPERation Status and QUEStionable Status registers
using commands in the STATus subsystem.
The STATus subsystem also has transition filter software which give you the ability
to select the logic transitions which set bits in the OPERation Status and QUEStion-
able Status registers. For example, you can define the POWer bit of the QUEStion-
able Status register to report an event when the condition transitions from false to
true. This is a positive transition. You can also specify a negative transition where
the bit is set when the condition transitions from true to false.
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