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PS MIO: CAN
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PS MIO: I2C shared across PS and PL
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PS MIO: SD
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PS MIO: DisplayPort
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PS MIO: Ethernet
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PS MIO: USB3
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PS-side user LED (one)
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PL-side user LEDs (four)
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PL-side user DIP switch (4-position)
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PL-side user pushbuttons (four)
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PL-side CPU reset pushbutton
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PL-side PMOD headers
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PL-side bank 0 PROG_B pushbutton
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Security - PSBATT button battery backup
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Operational switches (power on/off, PROG_B, boot mode DIP switch)
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Operational status LEDs (power status, INIT, DONE, PG, DDR power good)
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Power management
The ZCU104 provides a rapid prototyping platform for the embedded vision low cost (EVLC)
market using the XCZU7EV-2FFVC1156 device. The ZU7EV contains PS hard block
peripherals exposed through the multi-use I/O (MIO) interface and several FPGA
programmable logic (PL), high-density (HD), and high-performance (HP) banks.
lists the resources available within the ZU7EV. See the Zynq UltraScale+ MPSoC Data Sheet:
Overview (DS891)
ZCU104 Board User Guide
UG1267 (v1.1) October 9, 2018
[Ref 1]
for a feature set overview, description, and ordering information.
www.xilinx.com
Chapter 1: Introduction
Table 1-1
8
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