Xilinx ZCU104 User Manual page 28

Table 3-3: DDR4 Component Memory Connection to XCZU7EV PS Bank 504 (Cont'd)
XCZU7EV (U1)
Pin
AP33
R156 P/D
The ZCU104 board DDR4 64-bit component PS memory interface adheres to the constraints
guidelines documented in the "PCB Guidelines for DDR4" section of UltraScale Architecture
PCB Design User Guide (UG583)
impedance implementations. Other memory interface details are also available in the
UltraScale Architecture FPGAs Memory Interface Solutions Product Guide (PG150)
more details, see the Micron MT40A256M16HA-083E data sheet at the Micron website
[Ref 11].
ZCU104 Board User Guide
UG1267 (v1.1) October 9, 2018
Net Name
DDR4_CS_B
DDR4_TEN
[Ref 4]. The ZCU104 DDR4 PS component interface is a 40Ω
www.xilinx.com
Chapter 3: Board Component Descriptions
DDR4 Component Memory
Pin # Pin Name
L7 CS_B
N9 TEN
Ref. Des.
U2,U99-U101
U2,U99-U101
[Ref 5]. For
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