Xilinx ZCU104 User Manual page 23

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I/O Voltage Rails
The XCZU7EV MPSoC PL I/O bank voltages on the ZCU104 board are listed in
Table 3-2: I/O Voltage Rails
XCZU7EV
Power Net Name
PL Bank 28
PL Bank 64
PL Bank 65
PL Bank 66
PL Bank 67
PL Bank 68
PL Bank 87
PL Bank 88
PS Bank 500
PS Bank 501
PS Bank 502
PS Bank 503
PS Bank 504
Notes:
1. The ZCU104 board is shipped with V
ZCU104 Board User Guide
UG1267 (v1.1) October 9, 2018
Voltage
V
1.8V
CC1V8
V
1.2V
CC1V2
V
1.2V
CC1V2
V
1.2V
CC1V2
(1)
V
1.8V
ADJ_FMC
(1)
V
1.8V
ADJ_FMC
V
3.3V
CC3V3
V
3.3V
CC3V3
V
1.8V
CC1V8
V
1.8V
CC1V8
V
1.8V
CC1V8
V
1.8V
CC1V8
V
1.2V
CC1V2
set to 1.8V.
ADJ_FMC
www.xilinx.com
Chapter 3: Board Component Descriptions
Connected To
UART2 only (mostly NC pins)
DDR4 SODIMM DQ[0:31] (PL)
DDR4 SODIMM DQ[32:63] (PL)
DDR4 SODIMM ADDR/CTRL (PL)
FMC_LPC LA BUS
FMC_LPC LA BUS
PMOD0, PMOD1, HDMI CTRL, PL_I2C1
HDMI, GPIO LED/DIP SW/PB SW
CAN, UART0/1, I2C0/1, QSPI LWR
SDIO, DP
ENET, USB_DATA[0:7], USB_CTRL
PS CONFIG I/F
DDR4 (4x16-BIT) 64-BIT COMPONENT I/F (PS)
Send Feedback
Figure
3-2.
23

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