Xilinx ZCU104 User Manual page 60

Table 3-22: HDMI Connections to MPSoC U1
XCZU7EV
Schematic Net Name
(U1) Pin
M4 HDMI_TX0_P
M3 HDMI_TX0_N
L6 HDMI_TX1_P
L5 HDMI_TX1_N
K4 HDMI_TX2_P
K3 HDMI_TX2_N
H9 HDMI_TX_LVDS_OUT_P
G9 HDMI_TX_LVDS_OUT_N
B1 HDMI_TX_SRC_SCL
C1 HDMI_TX_SRC_SDA
A2 HDMI_TX_EN
A3 HDMI_TX_CEC
E3 HDMI_TX_HPD
N11 HDMI_SI5324_LOL
M12 HDMI_SI5324_RST
G14 HDMI_REC_CLOCK_C_P
F13 HDMI_REC_CLOCK_C_N
T8 HDMI_SI5324_OUT_C_P
T7 HDMI_SI5324_OUT_C_N
N2 HDMI_RX0_C_P
M3 HDMI_RX0_C_N
L2 HDMI_RX1_C_P
L1 HDMI_RX1_C_N
J2 HDMI_RX2_C_P
J1 HDMI_RX2_C_N
R10 HDMI_RX_CLK_C_P
R9 HDMI_RX_CLK_C_N
F6 HDMI_RX_HPD
E5 HDMI_RX_PWR_DET
D1 HDMI_CTL_SCL
E1 HDMI_CTL_SDA
ZCU104 Board User Guide
UG1267 (v1.1) October 9, 2018
I/O Standard
Pin
(1)
8
(1)
9
(1)
5
(1)
6
(1)
2
(1)
3
LVDS 11
LVDS 12
LVCMOS33 46
LVCMOS33 47
LVCMOS33 42
LVCMOS33 24
LVCMOS33 3
LVCMOS33 18
LVCMOS33 1
LVDS 16
LVDS 17
(1)
28
(1)
29
(1)
29
(1)
28
(1)
32
(1)
31
(1)
35
(1)
34
(1)
26
(1)
25
LVCMOS33 33
LVCMOS33 3
LVCMOS33 15
LVCMOS33 16
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Chapter 3: Board Component Descriptions
Connected Component
Name
IN_D0P
IN_D0N
IN_D1P
IN_D1N
IN_D2P
SN65DP159 (U94)
IN_D2N
Wired to top port (P7)
IN_CLKP
IN_CLKN
SCL_SRC
SDA_SRC
OE
CEC_A
TPD12S016RK (U70)
HPD_A
LOL
RST_B
CKIN1_P
SI5319C (U108)
CKIN1_N
CKOUT1_P
CKOUT1_N
OUT_D0P
OUT_D0N
OUT_D1P
TMDS181IRGZT (U19)
OUT_D1N
Wired to HDMI
OUT_D2P
bottom port(P7)
OUT_D2N
OUT_CLKP
OUT_CLKN
HPD_SNK
D
SCL_CTL
SDA_CTL
Send Feedback
Device
Q6
(2)
60