Xilinx ZCU104 User Manual page 73

Table 3-26: GTH Bank 226 Interface Connections (Cont'd)
XCZU7EV XCZU7EV Pin
(U1) Pin Name
U10 MGTREFCLK1P
U9 MGTREFCLK1N
Notes:
1. Series capacitor coupled.
2. MGT connections I/O standard not applicable.
Table 3-27: GTH Bank 227 Interface Connections
XCZU7EV XCZU7EV Pin
(U1) Pin Name
M4 MGTHTXP0
M3 MGTHTXN0
L6 MGTHTXP1
L5 MGTHTXN1
K4 MGTHTXP2
K3 MGTHTXN2
N2 MGTHRXP0
N1 MGTHRXN0
L2 MGTHRXP1
L1 MGTHRXN1
J2 MGTHRXP2
J1 MGTHRXN2
H4 MGTHTXP3
H3 MGTHTXN3
G2 MGTHRXP3
G1 MGTHRXN3
T8 MGTREFCLK0P
T7 MGTREFCLK0N
R10 MGTREFCLK1P
R9 MGTREFCLK1N
Notes:
1. Series capacitor coupled.
2. MGT connections I/O standard not applicable.
ZCU104 Board User Guide
UG1267 (v1.1) October 9, 2018
Schematic Net Name
(1)
HDMI_DRU_CLOCK_C_N
(1)
HDMI_DRU_CLOCK_C_P
Schematic Net Name
(1)
HDMI_TX0_P
(1)
HDMI_TX0_N
(1)
HDMI_TX1_P
(1)
HDMI_TX1_N
(1)
HDMI_TX2_P
(1)
HDMI_TX2_N
HDMI_RX0_C_P
HDMI_RX0_C_N
HDMI_RX1_C_P
HDMI_RX1_C_N
HDMI_RX2_C_P
HDMI_RX2_C_N
FMC_LPC_DP0_C2M_N
FMC_LPC_DP0_C2M_P
FMC_LPC_DP0_M2C_P
FMC_LPC_DP0_M2C_N
HDMI_8T49N241_OUT_C_N
HDMI_8T49N241_OUT_C_P
(1)
HDMI_RX_CLK_C_P
(1)
HDMI_RX_CLK_C_N
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Chapter 3: Board Component Descriptions
(2)
Pin No. Pin Name
48
47 NQ0
Connected To
(2)
Pin
Pin Name
No.
8 IN_D0P
9 IN_D0N
5 IN_D1P
6 IN_D1N
2 IN_D2P
3 IN_D2N
29 OUT_D0P
28 OUT_D0N
32 OUT_D1P
31 OUT_D1N
35 OUT_D2P
34 OUT_D2N
A34 DP4_C2M_P
A35 DP4_C2M_N
A14 DP4_M2C_P
A15 DP4_M2C_N
(1)
22 Q2
(1)
23 NQ2
26 OUT_CLKP
25 OUT_CLKN
Connected To
Device
Q0
8T49N287 U182
Device
SN64DP159R U94
TMDS181IR U19
FMC LPC J5
8T49N241 U181
TMDS181IR U19
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