Synchronous Write Cycle; Memory Interface - Motorola MC68030 User Manual

current cycle or if the device cannot supply 32 bits, CIIN must be asserted at the same
time as STERM. In addition, the state of CBACK is latched when STERM is recognized.
Since CIIN, CBACK, and STERM are synchronous signals, they must meet the
synchronous input setup and hold times for all rising edges of the clock while AS is
asserted. If STERM is negated at the beginning of S2, wait states are inserted after S2,
and STERM is sampled on every rising edge thereafter until it is recognized. Once
STERM is recognized, data is latched on the next falling edge of the clock
(corresponding to the beginning of S3).
State 3
The processor negates AS, DS, and DBEN during S3. It holds the address valid during
S3 to simplify memory interfaces. R/W, SIZ0–SIZ1, and FC0–FC2 also remain valid
throughout S3.
The external device must keep its data asserted throughout the synchronous hold time
for data from the beginning of S3. The device must remove its data within one clock
after asserting STERM and negate STERM within two clocks after asserting STERM;
otherwise, the processor may inadvertently use STERM for the next bus cycle.

7.3.5 Synchronous Write Cycle

A synchronous write cycle is terminated differently from an asynchronous write cycle and
the data strobe may not be useful. Otherwise, the cycles assert and respond to the same
signal, in the same sequence. STERM is asserted by the external device to terminate a
synchronous write cycle. The discussion of STERM in the preceding section applies to write
cycles as well as to read cycles.
DS is not asserted for two-clock synchronous write cycles; therefore, the clock (CLK) may
be used as the timing signal for latching the data. In addition, there is no time from the latest
assertion of AS and the required assertion of STERM for any two-clock synchronous bus
cycle. The system must qualify a memory write with the assertion of AS to ensure that the
write is not aborted by internal conditions within the MC68030.
MOTOROLA MC68030 USER'S MANUAL
Bus Operation
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