Motorola MC68030 User Manual page 190

Bus Operation
State 1
One-half clock later in S1, the processor asserts AS, indicating that the address on the
address bus is valid. The processor also asserts DBEN during S1, which can enable
external data buffers. In addition, the ECS (and OCS, if asserted) signal is negated during
S1.
State 2
During S2, the processor places the data to be written onto the D0–D31, and samples
DSACKx at the end of S2.
State 3
The processor asserts DS during S3, indicating that the data is stable on the data bus. As
long as at least one of the DSACKx signals is recognized by the end of S2 meeting the
asynchronous input setup time requirement), the cycle terminates one clock later. If
DSACKx is not recognized by the start of S3, the processor inserts wait states instead of
proceeding to S4 and S5. To ensure that wait states are inserted, both DSACK0 and
DSACK1 must remain negated throughout the asynchronous input setup and hold times
around the end of S2. If wait states are added, the processor continues to sample the
DSACKx signals on the falling edges of the clock until one is recognized. The selected
device uses R/W, DS, SIZ0–SIZ1, and A0–A1 to latch data from the appropriate byte(s)
of the data bus (D24–D31, D16–D23, D8–D15, and D0–D7). SIZ0–SIZ1 and A0–A1
select the bytes of the data bus. If it has not already done so, the device asserts DSACKx
to signal that it has successfully stored the data.
State 4
The processor issues no new control signals during S4.
State 5
The processor negates AS and DS during S5. It holds the address and data valid during
S5 to provide address hold time for memory systems. R/W, SIZ0–SIZ1, FC0–FC2, and
DBEN also remain valid throughout S5.
The external device must keep DSACKx asserted until it detects the negation of AS or
DS (whichever it detects first). The device must negate DSACKx within approximately
one clock period after sensing the negation of AS or DS. DSACKx signals that remain
asserted beyond this limit may be prematurely detected for the next bus cycle.
7-44 MC68030 USER'S MANUAL MOTOROLA