Instruction Set Summary
3.4 INSTRUCTION SET SUMMARY
Table 3–14 provides a alphabetized listing of the MC68030 instruction set listed by opcode,
operation, and syntax.
Table 3–14 use notational conventions for the operands, the subfields and qualifiers, and
the operations performed by the instructions. In the syntax descriptions, the left operand is
the source operand, and the right operand is the destination operand. The following list
contains the notations used in Table 3–14.
Notation for operands:
PC
SR
Immediate Data
Source
Destination
Vector
+ inf
–inf
〈fmt〉
FPm
FPn
Notation for subfields and qualifiers:
〈bit〉 of (operand〉
〈ea〉 {offset:width}
(〈operand〉)
〈operand〉
(〈address register〉)
–(〈address register〉)
(〈address register〉) + —
#xxx or #〈data〉
3-18
—
Program counter
—
Status register
V
—
Overflow condition code
—
Immediate data from the instruction
—
Source contents
—
Destination contents
—
Location of exception vector
—
Positive infinity
—
Negative infinity
—
Operand data format: byte (B) word (W), long
(L), single (S), double (D), extended (X), or
packed (P)
—
One of eight floating-point data registers (always
specifies the source register)
—
One of eight floating-point data registers (always
specifies the destination register)
—
Selects a single bit of the operand
—
Selects a bit field
—
The contents of the referenced location
—
The operand is binary-coded decimal; operations are per-
10
formed in decimal
—
The register indirect operation
—
Indicates that the operand register points to the memory
Location of the instruction operand — the optional mode
qualifiers are -, +, (d), and (d,ix)
—
Immediate data that follows the instruction word(s)
MC68030 USER'S MANUAL
MOTOROLA