Mixer; If Circuitry; Synthesizer - Tait TB8100 Service Manual

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K-Band Reciter
L-Band Reciter
2.4.2

Mixer

2.4.3

IF Circuitry

2.4.4

Synthesizer

TB8100 Service Manual
© Tait Electronics Limited September 2006
The incoming signal from the BNC connector is fed through a triplet helical
filter, followed by a simple low pass network which attenuates harmonics
and spurious responses from the preceding filter. The signal is then
amplified and passed through a low pass filter, which provides immunity to
interference from higher frequency out-of-band signals, and is then fed
through a band pass filter and pad to the mixer.
The incoming signal from the BNC connector is fed via a switch to a SAW
filter, followed by a simple low pass network which attenuates harmonics
and spurious responses from the preceding filter. The signal is then
amplified and passed through a low pass filter, which provides immunity to
interference from higher frequency out-of-band signals, and is then fed
through another SAW filter and pad to the mixer.
The RF signal from the front end is converted down to the 70.1MHz IF by
a high level (+17dBm local oscillator) mixer. The voltage controlled
oscillator (VCO) generates a level of 20dBM which is fed to the mixer
through an attenuator pad. A diplexer terminates the IF port of the mixer
in 50Ω, thus ensuring a good match for all mixing products, as well as
enhancing the linearity. The post-mixer buffer amplifier compensates for
the insertion loss of the crystal filter, and any excess gain is reduced by the
following attenuator pad.
The signal from the mixer is fed to the IF amplifier through a 4-pole crystal
filter which provides protection from strong off-channel signals. The IF
amplifier is a two-transistor design with voltage and current feedback, which
provides sufficient gain to drive the digital receiver. The 70.1MHz signal is
finally passed to the analogue-to-digital converter (ADC) in the digital
receiver via an anti-alias filter. This filter prevents IF noise at frequencies
other than 70.1MHz, generated in the amplifier, from being sampled by the
ADC at other Nyquist zones.
The receiver synthesizer consists of a programmable frequency synthesizer
IC, the receiver VCO, and a stable known reference.
The synthesizer uses a phase-locked loop to lock the receiver VCO to a
stable known frequency reference. The synthesizer IC receives the divider
and control information from the RISC processor via a 3-wire serial bus
(clock, data and enable). When the data bits are latched in, the synthesizer
processes the incoming signals from the VCO feedback signal (f
the reference oscillator (f
).
ref
Reciter Circuit Description
) and
vcofb
43

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