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Model 4200-SCS User's Manual
Table 3-12
Return values for Vdid_Pulse_DC_Family_pulseiv (continued)
Value
-11
-12
-13
-14
-15
-16
vgsid_pulseiv
Description
Connection
Table 3-13
Inputs for vgsid_pulseiv
Input
Vds
Vg_off
VgStart
VgStop
VgStep
PulseWidth
PulsePeriod
AverageNum
4200-900-01 Rev. K / February 2017
Description
Invalid VPUId
Invalid GateSMU
Invalid DrainSMU
Unable to initialize PIV solution
Invalid GateSMU Range
Invalid DrainSMU Range
The vgsid_pulse sweep is used to perform a pulsed Vg-Ig sweep using the 4200-
PIV package. This test is similar to a typical DC Vg-Id but only two sources are
used: gate (VPUID pulse channel 1) and drain (DrainSMU). The gate is pulsed,
but the drain is DC biased.
Measurements are made with the 2 channel scope card. Set the appropriate values
for the Vgs-Id parameters
and return values, respectively.
The source and body (well) of the DUT must be shorted together and connected to
the common low (outer shield) of the SMA cables on the AC+DC output of the
4200-RBT. The RBT connected to GateSMU (with the Power Divider) should be
connected to the gate. The RBT connected to DrainSMU should be connected to
the drain. For detailed connection information, refer to the
assembly procedure on page
Type
Description
double
The drain-source voltage, output by the DrainSMU (defined below).
double
The DC bias applied by the GateSMU to put device in the OFF
state. Normally set to 0 V for enhancement FETs (may be non-zero for
depletion FETs).
double
The starting sweep value for Vg, output by channel 1 of the pulse
generator card (VPUID).
double
The final sweep value for Vg, output by channel 1 of the pulse
generator card (VPUID).
double
The sweep step size for the Vg sweep, output by channel 1 of the pulse
generator card (VPUID).
double
The Vgs pulse width (PW). The PW can be 40 ns to 150 ns (10 ns
resolution). Pulses wider than 150 ns will begin to be attenuated by the
capacitor in the 4200-RBT.
double
The pulse period for the Vgs pulse. The period can be set from 100µs to
1 s (10 ns resolution). The period must be set so that the Duty Cycle
(DC) is no more than 0.1%. The period is most easily calculated by
multiplying the largest desired pulse width (PW) by1000. Example: PW
= 150 ns, so Period = 150 us.
int
The number of pulses to average at each step of the sweep. For best
low signal performance, set AverageNum = 0 for Adaptive Filtering.
Return to
Section Topics
Section 3: Common Device Characterization Tests
(Table
3-13).
Table 3-14
3-35.
and
Table 3-15
contain outputs
PIV-A interconnect
3-57
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