Xilinx HDMI 1.4 Product Manual page 39

Table 3‐1: Max Bits Per Component Support
Max Bits Per Component
16
12
10
8
As an illustration, when Max Bits Per Component is set to 12,
format for quad pixels per clock to be fully compliant with the AXI4-Stream video protocol.
A data format for a fully compliant AXI4-Stream video protocol with dual pixels per clock is
illustrated in Figure
HDMI 1.4/2.0 TX Subsystem
PG235 October 4, 2017
Actual Bits Per Component
8
10
12
16
8
10
12
16
8
10
12
16
8
10
12
16
3-5.
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Chapter 3: Designing with the Subsystem
Bits Transported by Hardware
[7:0]
[9:0]
[11:0]
[15:0]
[7:0]
[9:0]
[11:0]
[15:4]
[7:0]
[9:0]
[11:2]
[15:6]
[7:0]
[9:2]
[11:4]
[15:8]
Figure 3-4 shows the data
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