Xilinx HDMI 1.4 Product Manual page 26

X-Ref Target - Figure 2-18
Figure 2‐18: HDMI TX Subsystem Pinout – Native Video Interface
HDMI 1.4/2.0 TX Subsystem
PG235 October 4, 2017
S_AXI_CPU_IN S_AXI_CPU_IN
AUDIO_IN AUDIO_IN
VIDEO_IN VIDEO_IN
VIDEO_IN_tdata[3*BPC*PPC-1:0] VIDEO_IN_tdata[3*BPC*PPC-1:0]
VIDEO_IN_active_video VIDEO_IN_active_video
VIDEO_IN_hsync VIDEO_IN_hsync
VIDEO_IN_vsync VIDEO_IN_vsync
SB_STATUS_IN SB_STATUS_IN
s_axi_cpu_aclk s_axi_cpu_aclk
s_axi_cpu_aresetn s_axi_cpu_aresetn
s_axi_audio_aclk s_axis_audio_aclk
s_axi_audio_aresetn s_axis_audio_aresetn
acr_cts[19:0] acr_cts[19:0]
acr_n[19:0] acr_n[19:0]
acr_valid acr_valid
video_clk video_clk
hpd hpd
(HDCP 1.4 and HDCP 2.2)
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Chapter 2: Product Specification
LINK_DATA0_OUT LINK_DATA0_OUT
LINK_DATA1_OUT LINK_DATA1_OUT
LINK_DATA2_OUT LINK_DATA2_OUT
link_clk link_clk
DDC_OUT DDC_OUT
irq irq
video_rst video_rst
hdcp22_irq
hdcp14_key_aclk
hdcp22_timer_irq
hdcp14_key_aresetn
hdcp14_start_key_transmit
hdcp14_reg_key_sel[2:0]
hdcp14_irq
hdcp14_timer_irq
HDCP14_KEY_IN
hdcp22_irq
hdcp22_timer_irq
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