Omron CS1G/H-CPUxx-EV1 Programming Manual page 205

Using Tasks
TKOF(821)
Cyclic Task Numbers and the Execution Cycle (Including Extra Cyclic Tasks)
Relationship of Tasks to I/O Memory
Cyclic task 1
TKON (820)
Cyclic task 2
If a TKOF(821) instruction is executed for the task it is in, the task will stop
being executed where the instruction is executed, and the task will shift to
Standby status.
If task m turns ON task n and m > n, task n will go to READY status the next
cycle.
Example:If task 5 turns ON task 2, task 2 will go to READY status the next
cycle.
If task m turns ON task n and m < n, task n will go to READY status the same
cycle.
Example:If task 2 turns ON task 5, task 5 will go to READY status in the same
cycle.
If task m places task n in Standby status and m > n, will go to Standby status
the next cycle.
Example: If task 5 places task 2 in Standby status, task 2 will go to Standby
status the next cycle.
If task m places task n in Standby status and m < n, task n will go to Standby
status in the same cycle.
Example: If task 2 places task 5 in Standby status, task 5 will go to Standby
status in the same cycle.
There are two different ways to use Index Registers (IR) and Data Registers
(DR): 1) Independently by task or 2) Shared by all task (supported by CS1-H,
CJ1-H, CJ1M, or CS1D CPU Units only).
With independent registers, IR0 used by cyclic task 1 for example is different
from IR0 used by cyclic task 2. With shared registers, IR0 used by cyclic task
1 for example is the same as IR0 used by cyclic task 2.
The setting that determines if registers are independent or shared is made
from the CX-Programmer.
Cyclic task 1
Standby status
RUN status Cyclic task 2
Task 2
Task execution will
stop here and the task
will shift to Standby
status.
Section 4-2
Standby status
RUN status
169