Overview - Samsung S3C2501X User Manual

32-bit risc microprocessor
Table of Contents

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Table
Number
8-1
8-2
8-3
8-4
8-5
8-6
8-7
8-8
8-9
8-10
8-11
8-12
8-13
8-14
8-15
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
S3C2501X
List of Tables
DES/3DES Special Registers Overview .................................................................8-3
DES/3DES Control Register Description.................................................................8-4
DES/3DES Status Register Description ..................................................................8-5
DES/3DES Interrupt Enable Register Description ...................................................8-6
DES/3DES Run Enable Register Description..........................................................8-6
DES/3DES Key1 Left Side Register Description .....................................................8-6
DES/3DES Key 1 Right Side Register Description..................................................8-6
DES/3DES Key 2 Left Side Register Description ....................................................8-7
DES/3DES Key 2 Right Side Register Description..................................................8-7
DES/3DES Key 3 Left Side Register Description ....................................................8-7
DES/3DES Key 3 Right Side Register Description..................................................8-7
DES/3DES IV Left Side Register Description..........................................................8-7
DES/3DES IV Right Side Register Description .......................................................8-7
DES/3DES Input Data FIFO Description.................................................................8-8
DES/3DES Output Data FIFO Description ..............................................................8-8
GDMA Special Registers Overview ........................................................................9-3
GDMA Programmable Priority Registers ................................................................9-4
DCON0/1/2/3/4/5 Registers ....................................................................................9-9
GDMA Control Register Description .......................................................................9-9
DSAR0/1/2/3/4/5 and DDAR0/1/2/3/4/5 Registers...................................................9-12
DTCR0/1/2/3/4/5 Registers.....................................................................................9-13
DRER0/1/2/3/4/5 Registers.....................................................................................9-14
DIPR0/1/2/3 Registers ............................................................................................9-15
(Continued)
Title
Page
Number
xxiii

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