Arbitration Scheme - Samsung S3C2501X User Manual

32-bit risc microprocessor
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SYSTEM CONFIGURATION
External address pins

4.6 ARBITRATION SCHEME

The S3C2501X can support the fixed priority and the round-robin method for AHB bus arbitration by register
setting. Especially, the S3C2501X can program the priority order in the fixed priority mode as well as the ratio of
the bus occupancy in the round-robin priority mode.
The internal function blocks or AHB bus masters are divided into three groups, Group A, Group B, and Group C.
Group A has only Test Interface Controller (TIC) block. The Group A has the highest bus priority. Group B has 3
AHB bus masters, General DMA, Ethernet Controller 0, Ethernet Controller 1. The S3C2501X can program the
bus priority of each bus masters among Group B. So the bus priority of bus masters in only Group B can be
programmed. Group C has the ARM940T CPU. The relative priority of Group B and Group C is determined more
or less in an alternating manner.
The local priority of six channels of general DMA can be programmed by fixed priority or round-robin priority in
similar manner to the AHB bus priority. Please refer to the general DMA chapter.
Function Block
Test Interface Controller (TIC)
General DMA (GDMA)
Ethernet Controller 0
Ethernet Controller 1
ARM940T CPU
4-4
ADDR[23:0]
External
Figure 4-2. External Address Bus Diagram
Table 4-2. AHB Bus Priorities for Arbitration
Data bus width configuration
(8/16/32-bit)
8 bit
16 bit
32 bit
Internal
AHB Bus Priority (Group)
Group A (highest priority)
HADDR[23:0]
HADDR[24:1]
HADDR[25:2]
Group B
Group B
Group B
Group C
S3C2501X

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