Use Of The S Bit; Use Of R15 As The Base - Samsung S3C2501X User Manual

32-bit risc microprocessor
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S3C2501X
Rn

3.11.4 USE OF THE S BIT

When the S bit is set in a LDM/STM instruction its meaning depends on whether or not R15 is in the transfer list
and on the type of instruction. The S bit should only be set if the instruction is to execute in a privileged mode.
3.11.4.1 LDM with R15 in Transfer List and S Bit Set (Mode Changes)
If the instruction is a LDM then SPSR_<mode> is transferred to CPSR at the same time as R15 is loaded.
3.11.4.2 STM with R15 in Transfer List and S Bit Set (User Bank Transfer)
The registers transferred are taken from the user bank rather than the bank corresponding to the current mode.
This is useful for saving the user state on process switches. Base write-back should not be used when this
mechanism is employed.
3.11.4.3 R15 not in List and S Bit Set (User Bank Transfer)
For both LDM and STM instructions, the user bank registers are transferred rather than the register bank
corresponding to the current mode. This is useful for saving the user state on process switches. Base write-back
should not be used when this mechanism is employed.
When the instruction is LDM, care must be taken not to read from a banked register during the following cycle
(inserting a dummy instruction such as MOV R0, R0 after the LDM will ensure safety).

3.11.5 USE OF R15 AS THE BASE

R15 should not be used as the base register in any LDM or STM instruction.
0x100C
0x1000
0x0FF4
1
0x100C
0x1000
R5
R1
0x0FF4
Rn
3
Figure 3-22. Pre-Decrement Addressing
INSTRUCTION SET
0x100C
0x1000
R1
0x0FF4
2
0x100C
0x1000
R7
R5
R1
0x0FF4
4
3-43

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