Gdma Transfer Timing Data - Samsung S3C2501X User Manual

S3C2501X

9.6 GDMA TRANSFER TIMING DATA

Figure 9-10 provides the detailed timing data for GDMA data transfers that are triggered by external GDMA
requests. Please note that read/write timing depends on which memory banks are selected. The S3C2501X has
the internal clock, HCLK, as the operating clock. The clock frequency of HCLK is 133MHz,
Internal Clk
(HCLK)
xGDMA_Req
xGDMA_Ack
tXDRs tXDRh
Min.2 cycle
tXDRs setup time
tXDRh hold time
tXDAr delay (rising)
tXDAf delay (falling)
Figure 9-10. External GDMA Requests Detailed Timing
tXDAr
Programmable by
DCON[16:13]
worst
6.5 nsec
0 nsec
7.982 nsec 3.103 nsec
8.002 nsec 2.703 nsec
GDMA CONTROLLER
tXDAf
best
9-19