Interrupt By Priority Register; Interrupt Test Register - Samsung S3C2501X User Manual

INTERRUPT CONTROLLER

13.4.5 INTERRUPT BY PRIORITY REGISTER

The interrupt by priority registers, IPRIORHI and IPRIORLO, contain interrupt pending bits, which are re-ordered
by the INTPRIORn register settings. IPRIORLO[13] is mapped to the interrupt source of whichever bit index is
written into the priority 13 field of the INTPRIORn registers.
This register is useful for testing. To validate the interrupt pending by priority value, you can obtain the highest
priority pending interrupt from the interrupt offset register, INTOFFSET.
Register Address
IPRIORHI 0xF0140010
IPRIORLO 0xF0140014

13.4.6 INTERRUPT TEST REGISTER

The interrupt test registers, INTTSTHI and INTTSTLO, are used to monitor a interrupt pending status. The
interrupt pending test registers, INTTSTHI and INTTSTLO, are also useful for testing.
Register Address
INTTSTHI 0xF0140048
INTTSTLO 0xF014004C
13-12
Table 13-8. IPRIORHI, IPRIORLO Register
R/W
R High bits, 38-32 bit, Interrupt by priority register
R Low bits, 31-0 bit, Interrupt by priority register
Table 13-9. INTTSTHI, INTTSTLO Register
R/W
R High bits, 38-7 bit, Interrupt test register
R Low bits, 6-0 bit, Interrupt test register
Description
Description
S3C2501X
Reset Value
0x00000000
0x00000000
Reset Value
0x00000000
0x00000000