Format 6: Pc-Relative Load; Operation; Instruction Cycle Times - Samsung S3C2501X User Manual

INSTRUCTION SET

3.25 FORMAT 6: PC-RELATIVE LOAD

15 14 13
0 0 0

3.25.1 OPERATION

This instruction loads a word from an address specified as a 10-bit immediate offset from the PC. The THUMB
assembler syntax is shown below.
THUMB Assembler
LDR Rd, [PC, #Imm]
NOTE: The value specified by #Imm is a full 10-bit address, but must always be word-aligned (ie with bits 1:0 set to 0),
since the assembler places #Imm >> 2 in field Word 8. The value of the PC will be 4 bytes greater than
the address of this instruction, but bit 1 of the PC is forced to 0 to ensure it is word aligned.

3.25.2 INSTRUCTION CYCLE TIMES

All instructions in this format have an equivalent ARM instruction. The instruction cycle times for the THUMB
instruction are identical to that of the equivalent ARM instruction.
Examples
LDR R3,[PC,#844]
3-76
12 11 10
0 0 Rd
[7:0] Immediate Value
[10:8] Destination Register
Figure 3-35. Format 6
Table 3-13. Summary of PC-Relative Load Instruction
ARM Equivalent
LDR Rd, [R15, #Imm]
8 7
Add unsigned offset (255 words, 1020 bytes) in
Imm to the current value of the PC. Load the
word from the resulting address into Rd.
; Load into R3 the word found at the
; address formed by adding 844 to PC.
; bit[1] of PC is forced to zero.
; Note that the THUMB opcode will contain
; 211 as the Word8 value.
Word 8
Action
S3C2501X
0