The Condition Field - Samsung S3C2501X User Manual

32-bit risc microprocessor
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INSTRUCTION SET

3.2 THE CONDITION FIELD

In ARM state, all instructions are conditionally executed according to the state of the CPSR condition codes and
the instruction's condition field. This field (bits 31:28) determines the circumstances under which an instruction is
to be executed. If the state of the C, N, Z and V flags fulfils the conditions encoded by the field, the instruction is
executed, otherwise it is ignored.
There are sixteen possible conditions, each represented by a two-character suffix that can be appended to the
instruction's mnemonic. For example, a branch (B in assembly language) becomes BEQ for "Branch if "Equal",
which means the branch will only be taken if the Z flag is set.
In practice, fifteen different conditions may be used: these are listed in Table 3-2. The sixteenth (1111) is
reserved, and must not be used.
In the absence of a suffix, the condition field of most instructions is set to "Always" (suffix AL). This means the
instruction will always be executed regardless of the CPSR condition codes.
Code
Suffix
0000
EQ
0001
NE
0010
CS
0011
CC
0100
MI
0101
PL
0110
VS
0111
VC
1000
1001
LS
1010
GE
1011
LT
1100
GT
1101
LE
1110
AL
3-4
Table 3-2. Condition Code Summary
Z set
Z clear
C set
C clear
N set
N clear
V set
V clear
HI
C set and Z clear
C clear or Z set
N equals V
N not equal to V
Z clear AND (N equals V)
Z set OR (N not equal to V)
(Ignored)
Flags
Meaning
Equal
Not equal
Unsigned higher or same
Unsigned lower
Negative
Positive or zero
Overflow
No overflow
Unsigned higher
Unsigned lower or same
Greater or equal
Less than
Greater than
Less than or equal
Always
S3C2501X

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