High-Speed Uart Baud Rate Divisor Register - Samsung S3C2501X User Manual

SERIAL I/O (HIGH-SPEED UART)

11.3.6 HIGH-SPEED UART BAUD RATE DIVISOR REGISTER

The values stored in the baud rate divisor registers, HUBRD let you determine the serial Tx/Rx clock rate (baud
rate) as follows:
Registers Offset Address
HUBRD 0xF0080014
31 30 29 28 27 26 25 24 23 22 21
11-18
BRGOUT =
Table 11-12. High-Speed UART Transmit Register
R/W
R/W High-Speed UART baud rate divisor register
20 19 18 17
[3:0] Baud reate divisor value CNT1
xxx0 = divide by 1
xxx1 = divide by 16
[15:4] Time constant value for CNT0
Figure 11-7. High-Speed UART Baud Rate Divisor Register
PCLK2 or EXT_UCLK
(CNT0+1) × 16 × 16
CNT1
Description
16 15
CNT0
S3C2501X
Reset Value
0x00
4 3 0
CNT1