INSTRUCTION SET
3.27.2 INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 3-15. The instruction cycle
times for the THUMB instruction are identical to that of the equivalent ARM instruction.
Examples
STRH
LDSB
LDSH
3-80
R4, [R3, R0]
R2, [R7, R1]
R3, [R4, R2]
; Store the lower 16 bits of R4 at the
; address formed by adding R0 to R3.
; Load into R2 the sign extended byte
; found at the address formed by adding R1 to R7.
; Load into R3 the sign extended half-word
; found at the address formed by adding R2 to R4.
S3C2501X